- 6.1.5. 10/100/1000 Ethernet MAC Without Internal FIFO Buffers with 1000BASE-X/SGMII 2XTBI PCS Signals
- 6.1.6. 10/100/1000 Ethernet MAC Without Internal FIFO Buffers with IEEE 1588v2 and 1000BASE-X/SGMII 2XTBI PCS Signals
4.2. 1000BASE-X/SGMII PCS With Optional Embedded PMA
The Intel FPGA 1000BASE-X/SGMII PCS function implements the functionality specified by IEEE 802.3 Clause 36. It does not support carrier extension, frame bursting, and low power idle features. The PCS function is accessible via MII (SGMII) or GMII (1000BASE-X/SGMII). The PCS function interfaces to an on- or off-chip SERDES component via the industry standard ten-bit interface (TBI).
You can configure the PCS function to include an embedded physical medium attachment (PMA) with a serial transceiver or LVDS I/O and soft CDR. The PMA interoperates with an external physical medium dependent (PMD) device, which drives the external copper or fiber network. The interconnect between Intel FPGA and PMD devices can be TBI or 1.25 Gbps serial.
The PCS function supports the following external PHYs:
- 1000 BASE-X PHYs as is.
- 10BASE-T, 100BASE-T, and 1000BASE-T PHYs if the PHYs support SGMII.
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