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Visible to Intel only — GUID: bhc1410931867729
Ixiasoft
Visible to Intel only — GUID: bhc1410931867729
Ixiasoft
6.1.11.3. IEEE 1588v2 TX Timestamp Request Signals
Signal | I/O | Width | Description |
---|---|---|---|
tx_egress_timestamp_request_valid_n | I | 1 | Assert this signal when a user-defined tx_egress_timestamp is required for a transmit frame. Assert this signal in the same clock cycle as the start of packet (avalon_st_tx_startofpacket or avalon_st_tx_startofpacket_n is asserted). |
tx_egress_timestamp_request_fingerprint | I | n | Use this bus to specify fingerprint for the user-defined tx_egress_timestamp. The fingerprint is used to identify the user-defined timestamp. The signal width is determined by the TSTAMP_FP_WIDTH parameter (default parameter value is 4). The value of this signal is mapped to user_fingerprint. This signal is only valid when you assert tx_egress_timestamp_request_valid. |