DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 1/24/2022

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Document Table of Contents

11.6. Sink MSA Registers

The MSA registers are allocated at addresses:

  • 0x0020 through 0x002f for Stream 0
  • 0x0040 through 0x004f for Stream 1
  • 0x0060 through 0x006f for Stream 2
  • 0x0080 through 0x008f for Stream 3
Note: Only registers for Stream 0 are listed in the following sections. Registers for Stream 0 are also available in non-GPU mode.