DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 1/24/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

11.6.2. DPRX0_MSA_NVID

Address: 0x0021

Direction: RO

Reset: 0x00000000

Table 144.  DPRX0_MSA_NVID Bits

Bit

Bit Name

Function

31:24

Unused

23:0

NVID/VFREQ[47:24]

8B/10B Channel Coding:

Main stream attribute NVID

128B/132B Channel Coding:

Main stream attribute VFREQ[47:24]

Did you find the information on this page useful?

Characters remaining:

Feedback Message