DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 1/24/2022
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10.8.22. DPTX_AUX_RESET

Address: 0x0117

Direction: WO

Reset: 0x00000000

Table 129.  DPTX_AUX_RESET Bits

Bit

Bit Name

Function

31:1

Unused

0

CLEAR

Asserting CLEAR resets the AUX Controller state machine:

  • 0 = No action
  • 1 = AUX Controller reset