DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 1/24/2022
Public

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11.9.6. DPRX_AUX_BYTE2

AUX Transaction Byte 2 Register.

Address: 0x0105

Direction: RW

Reset: 0x00000000

Table 181.  DPRX_AUX_BYTE2 Bits

Bit

Bit Name

Function

31:8

Unused

7:0

BYTE

Transaction length[3:0] received in the last request, or data(2) for the next reply (refer to VESA DisplayPort Standard).