DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 1/24/2022

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Document Table of Contents

6.6.1. Controller Interface

The controller interface allows you to control the sink from an external or on-chip controller, such as the Nios II processor for debugging. The controller interface is an Avalon-MM slave that also allows access to the sink’s internal status registers.

The sink asserts the rx_mgmt_irq port when issuing an interrupt to the controller.

Note: The controller interface is not available if you turned off the Enable GPU Control parameter.