F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683140
Date 10/04/2022
Public
Document Table of Contents

4.2.3. Transmit Interface

All TLPs transmitted by the application through the TX streaming interface are sent out as-is, without any tracking for completion. The F-Tile AVST IP for PCIe does not perform any check on the TLPs. User application logic is responsible for sending TLPs that comply with the PCIe specifications.

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