AN 802: Intel® Stratix® 10 SoC Device Design Guidelines

ID 683117
Date 12/14/2020
Document Table of Contents

3.2. Recommended System Topologies

Selecting the right system topology can help your design achieve the highest throughput possible. For optimum performance, observe Intel’s topology guidelines moving data between the HPS and FPGA. These guidelines cover both cache coherent and non-cache coherent data movements.

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