AN 802: Intel® Stratix® 10 SoC Device Design Guidelines

ID 683117
Date 12/14/2020
Public
Download
Document Table of Contents

1. Introduction to the Intel® Stratix® 10 SoC Device Design Guidelines

Updated for:
Intel® Quartus® Prime Design Suite 20.4

The purpose of this document is to provide a set of guidelines and recommendations, as well as a list of factors to consider, for designs that use the Intel® Stratix® 10 SoC FPGA devices. This document assists you in the planning and early design phases of the Intel® Stratix® 10 SoC FPGA design, Platform Designer sub-system design, board design and software application design.

This application note does not include all the Intel® Stratix® 10 Hard Processor System (HPS) device details, features or information on designing the hardware or software system.

For more information about the Intel® Stratix® 10 HPS features and individual peripherals, refer to the Intel® Stratix® 10 Hard Processor System Technical Reference Manual.

Note: Intel® recommends that you use Intel® Quartus® Prime Pro Edition and the Intel SoC FPGA Embedded Development Suite Pro to develop Intel® Stratix® 10 SoC designs. Although Intel® Quartus® Prime Standard Edition and the Intel SoC FPGA Embedded Development Suite Standard continue to support the Intel® Stratix® 10 SoC family on a maintenance basis, future enhancements are going to be supported with the Pro software, only. Hardware developed with Intel® Quartus® Prime Pro Edition only supports software developed with the Intel® SoC FPGA Embedded Development Suite Pro.

Hardware developed with Intel® Quartus® Prime Standard Edition only supports software developed with the Intel® SoC FPGA Embedded Development Suite Standard.