1. Introduction to the Intel® Stratix® 10 SoC Device Design Guidelines
|Intel® Quartus® Prime Design Suite 20.4|
The purpose of this document is to provide a set of guidelines and recommendations, as well as a list of factors to consider, for designs that use the Intel® Stratix® 10 SoC FPGA devices. This document assists you in the planning and early design phases of the Intel® Stratix® 10 SoC FPGA design, Platform Designer sub-system design, board design and software application design.
This application note does not include all the Intel® Stratix® 10 Hard Processor System (HPS) device details, features or information on designing the hardware or software system.
For more information about the Intel® Stratix® 10 HPS features and individual peripherals, refer to the Intel® Stratix® 10 Hard Processor System Technical Reference Manual.
Hardware developed with Intel® Quartus® Prime Standard Edition only supports software developed with the Intel® SoC FPGA Embedded Development Suite Standard.
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