AN 802: Intel® Stratix® 10 SoC Device Design Guidelines

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ID 683117
Date 12/14/2020
Public
Document Table of Contents

3.6. Interfacing to the FPGA for Intel® Stratix® 10 SoC FPGAs Revision History

Table 12.  Interfacing to the FPGA for Stratix 10 SoC FPGAs Revision History

Document Version

Changes
2020.08.24 Maintenance release
2019.04.17 Maintenance release
2019.03.19 Maintenance release
2018.12.24 Maintenance release
2018.09.24 Added information about how to configure and use the bridges during FPGA Configuration First and HPS Boot First modes.
2018.05.07 Maintenance release
2018.03.01 Maintenance release
2017.11.06 Initial release

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