AN 802: Intel® Stratix® 10 SoC Device Design Guidelines

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ID 683117
Date 12/14/2020
Public
Document Table of Contents

5.10.5. HPS Boot Sources

The HPS FSBL is included with the initial FPGA configuration bitstream; and the HPS SSBL can be in several places:
  • SDM QSPI
  • HPS SD/eMMC
  • HPS NAND

GUIDELINE: Intel® recommends to place the HPS SSBL on the HPS SD/eMMC flash.

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