GTS AXI Streaming Intel® FPGA IP for PCI Express* User Guide

ID 813754
Date 5/15/2024
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7.3.2.1. Time Adjustment (32-bit LSB) to PTM Local Clock

Default value: 0x0000_0000

Table 64.  PTM Local Clock Adj LSB Register
Register Name Bit Attribute User Side Description
ptm_local_clock_adj_lsb 31:0 RW

k_cfg_ptm_local_clock_adj_lsb

Time adjustment (32-bits LSB) to ptm_local_clock reported from DWIP.