GTS AXI Streaming Intel® FPGA IP for PCI Express* User Guide

ID 813754
Date 5/15/2024
Public

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4.12.5. Malformed TLP

In the TLP Bypass mode, a malformed TLP is dropped in the GTS AXI Streaming IP and its event is logged in the AER capability registers. The GTS AXI Streaming IP also notifies you of this event by asserting the serr_out_o signal. Refer to the PCI Express* Base Specification for the definition of a malformed TLP.