Video and Image Processing Suite User Guide

ID 683416
Date 2/12/2021
Public

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14.3. Control Synchronizer Control Registers

Table 45.  Control Synchronizer Register MapThe control data is read once at the start of each frame and is buffered inside the IP core, so the registers can be safely updated during the processing of a frame.
Note: The width of each register of the frame reader is 32 bits.
Address Register Description
0 Control
  • Bit 0 of this register is the Go bit. Setting this bit to 0 causes the IP core to start passing through data.
  • Bit 1 of this register is the interrupt enable. Setting this bit to 1 enables the completion of writes interrupt.
1 Status Bit 0 of this register is the Status bit, all other bits are unused.
2 Interrupt

Bit 1 of this register is the completion of writes interrupt bit, all other bits are unused. Writing a 1 to bit 1 resets the completion of writes interrupt.

3 Disable Trigger
  • Setting this register to 1 disables the trigger condition of the control synchronizer.
  • Setting this register to 0 enables the trigger condition of the control synchronizer.
When you turn on the Require trigger reset via control port parameter, this register value is automatically set to 1 every time the control synchronizer triggers.
4 Number of writes This register sets how many write operations, starting with address and word 0, are written when the control synchronizer triggers.
5 Address 0 Address where word 0 must be written on trigger condition.
6 Word 0 The word to write to address 0 on trigger condition.
7 Address 1 Address where word 1 must be written on trigger condition.
8 Word 1 The word to write to address 1 on trigger condition.
9 Address 2 Address where word 2 must be written on trigger condition.
10 Word 2 The word to write to address 2 on trigger condition.
11 Address 3 Address where word 3 must be written on trigger condition.
12 Word 3 The word to write to address 3 on trigger condition.
13 Address 4 Address where word 4 must be written on trigger condition.
14 Word 4 The word to write to address 4 on trigger condition.
15 Address 5 Address where word 5 must be written on trigger condition.
16 Word 5 The word to write to address 5 on trigger condition.
17 Address 6 Address where word 6 must be written on trigger condition.
18 Word 6 The word to write to address 6 on trigger condition.
19 Address 7 Address where word 7 must be written on trigger condition.
20 Word 7 The word to write to address 7 on trigger condition.
21 Address 8 Address where word 8 must be written on trigger condition.
22 Word 8 The word to write to address 8 on trigger condition.
23 Address 9 Address where word 9 must be written on trigger condition.
24 Word 9 The word to write to address 9 on trigger condition.