Video and Image Processing Suite User Guide

ID 683416
Date 2/12/2021

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24.3. About the Warp Lite Intel FPGA IP

The IP must generate as continuous a flow of data at the output as possible. Therefore, the IP uses inverse mapping, which allows the output pixel stream to be generated directly from the stored input lines. Forward mapping is much more bursty in the mapping of input pixels to output pixels. The IP achieves the implied random access of the inverse mapping by storing the required input pixels in RAM.

The IP implements two warps:

  • Vertical keystone (maximum 30% distortion along horizontal edge)
  • Horizontal flip

The IP uses a two-dimensional perspective transform to define its warp mapping. The perspective transform is a flexible mapping that you define with eight parameters. The IP supports a minimum resolution of 128x128. Internal logic discards smaller frames. The IP supports a maximum resolution of full HD (1920x1080).

The warp transformation (refer Warp Definition Equations) allows for a much wider set of transforms than horizontal flip and vertical keystone. The Warp Lite IP implements a subset of these transforms that it can accommodate using on-chip RAM.

Vertical Keystone Distortion

The IP perspective transform can correct vertical keystone distortions.

Figure 78. Vertical Keystone Region DefinitionThe figure shows two examples of vertical keystone distortion. The rectangular input image (show in blue) distorts into a quadrilateral that has parallel horizontal sides. The IP can correct for maximum horizontal keystone of 30% distortion. This equates to an upper bound on the X1 and X3 parameters in the output coordinate space of 288 pixels for an image width of 1920 pixels.

Horizontal Flip

The horizontal flip reverses the image across each line.

The IP uses line stores at its front end. You can read the line data out in reverse order and implement a horizontal flip function.

Figure 79. Horizontal Flip