Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 10/02/2023

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Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. AXI-Stream Broadcaster Intel® FPGA IP 10. Bits per Color Sample Adapter Intel FPGA IP 11. Chroma Key Intel® FPGA IP 12. Chroma Resampler Intel® FPGA IP 13. Clipper Intel® FPGA IP 14. Clocked Video Input Intel® FPGA IP 15. Clocked Video to Full-Raster Converter Intel® FPGA IP 16. Clocked Video Output Intel® FPGA IP 17. Color Space Converter Intel® FPGA IP 18. Deinterlacer Intel® FPGA IP 19. FIR Filter Intel® FPGA IP 20. Frame Cleaner Intel® FPGA IP 21. Full-Raster to Clocked Video Converter Intel® FPGA IP 22. Full-Raster to Streaming Converter Intel® FPGA IP 23. Genlock Controller Intel® FPGA IP 24. Generic Crosspoint Intel® FPGA IP 25. Genlock Signal Router Intel® FPGA IP 26. Guard Bands Intel® FPGA IP 27. Interlacer Intel® FPGA IP 28. Mixer Intel® FPGA IP 29. Pixels in Parallel Converter Intel® FPGA IP 30. Scaler Intel® FPGA IP 31. Stream Cleaner Intel® FPGA IP 32. Switch Intel® FPGA IP 33. Tone Mapping Operator Intel® FPGA IP 34. Test Pattern Generator Intel® FPGA IP 35. Video and Vision Monitor Intel FPGA IP 36. Video Frame Buffer Intel® FPGA IP 37. Video Frame Reader Intel FPGA IP 38. Video Frame Writer Intel FPGA IP 39. Video Streaming FIFO Intel® FPGA IP 40. Video Timing Generator Intel® FPGA IP 41. Warp Intel® FPGA IP 42. Design Security 43. Document Revision History for Video and Vision Processing Suite User Guide

41.5.1. Using Warp IP Software

  1. Initialize intel_vvp_warp driver instance
  2. Allocate warp video channel
  3. Configure the channel by providing video resolution, color space, base address of the framebuffer region in RAM and other required parameters
  4. Instantiate WarpConfigurator object (intel_vvp_warp_mesh), set input, output video resolutions and desired transforms
  5. Generate transformation mesh
  6. Instantiate WarpDataGenerator object (intel_vvp_warp_data)
  7. Instantiate WarpDataContext object (intel_vvp_warp_data) and fill it in using input, output video resolution and required IP parameters available through the warp channel structure
  8. Generate mesh, data and filter coefficients by calling WarpDataGenerator::GenerateData() method and passing the data context object and the transformation mesh
  9. Transfer generated coefficients to the designated RAM region accessible by the warp IP
  10. Instantiate and fill in an intel_vvp_warp_data_t structure object using the addresses of the coefficient data in RAM and other required parameter
  11. Apply new warp by calling intel_vvp_warp_apply_transform() method of the driver passing the warp channel and warp data structures as parameters.