Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 10/02/2023
Public

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Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. AXI-Stream Broadcaster Intel® FPGA IP 10. Bits per Color Sample Adapter Intel FPGA IP 11. Chroma Key Intel® FPGA IP 12. Chroma Resampler Intel® FPGA IP 13. Clipper Intel® FPGA IP 14. Clocked Video Input Intel® FPGA IP 15. Clocked Video to Full-Raster Converter Intel® FPGA IP 16. Clocked Video Output Intel® FPGA IP 17. Color Space Converter Intel® FPGA IP 18. Deinterlacer Intel® FPGA IP 19. FIR Filter Intel® FPGA IP 20. Frame Cleaner Intel® FPGA IP 21. Full-Raster to Clocked Video Converter Intel® FPGA IP 22. Full-Raster to Streaming Converter Intel® FPGA IP 23. Genlock Controller Intel® FPGA IP 24. Generic Crosspoint Intel® FPGA IP 25. Genlock Signal Router Intel® FPGA IP 26. Guard Bands Intel® FPGA IP 27. Interlacer Intel® FPGA IP 28. Mixer Intel® FPGA IP 29. Pixels in Parallel Converter Intel® FPGA IP 30. Scaler Intel® FPGA IP 31. Stream Cleaner Intel® FPGA IP 32. Switch Intel® FPGA IP 33. Tone Mapping Operator Intel® FPGA IP 34. Test Pattern Generator Intel® FPGA IP 35. Video and Vision Monitor Intel FPGA IP 36. Video Frame Buffer Intel® FPGA IP 37. Video Frame Reader Intel FPGA IP 38. Video Frame Writer Intel FPGA IP 39. Video Streaming FIFO Intel® FPGA IP 40. Video Timing Generator Intel® FPGA IP 41. Warp Intel® FPGA IP 42. Design Security 43. Document Revision History for Video and Vision Processing Suite User Guide
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32.2. Switch IP Parameters

The IP offers compile- and run-time parameters.
Table 575.  Switch IP Parameters
Parameter Values Description
Video Data Format
Intel FPGA streaming video interface type Full, Lite, Full raster Select the required streaming video protocol.
Bits per color sample 8 to 16 Select the number of bits per color sample.
Number of color planes 1 to 4 Select the number of color planes per pixel.
Number of pixels in parallel 1 to 8 Select the number of color planes per pixel.
Switch settings
Number of inputs 1 to 8 Select the number of inputs required
Number of outputs 1 to 8 Select the number of outputs required
Crash switching On or off Select the type of switching required. Crash switching may cut short packets.
Autoconsume inputs On or off Turn on to allow inputs to consume automatically during switches if required.
All inputs are uninterrupted On or off For lite variants, turn on only when you can ensure that the start of another field always follows the end of each field. If you turn on for lite variants, the switch occurs at the start-of-field, as indicated by TUSER[0]. If you turn off for lite variants, the IP switch occurs at the end of each line, as indicated by TLAST. Full variants do not use this parameter, as the switch always occurs at field boundaries.
‘tready’ signal present on switch streaming interfaces On or off For full raster variants only, select if tready signals are present on the switch inputs and output connections.
Control settings
Debug features On or off No effect. The Switch IP has no debugging features.
Separate clock for control interface On or off Turn on for a separate clock for the control interface
Figure 69. Switch IP GUI