Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 10/02/2023
Public
Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. AXI-Stream Broadcaster Intel® FPGA IP 10. Bits per Color Sample Adapter Intel FPGA IP 11. Chroma Key Intel® FPGA IP 12. Chroma Resampler Intel® FPGA IP 13. Clipper Intel® FPGA IP 14. Clocked Video Input Intel® FPGA IP 15. Clocked Video to Full-Raster Converter Intel® FPGA IP 16. Clocked Video Output Intel® FPGA IP 17. Color Space Converter Intel® FPGA IP 18. Deinterlacer Intel® FPGA IP 19. FIR Filter Intel® FPGA IP 20. Frame Cleaner Intel® FPGA IP 21. Full-Raster to Clocked Video Converter Intel® FPGA IP 22. Full-Raster to Streaming Converter Intel® FPGA IP 23. Genlock Controller Intel® FPGA IP 24. Generic Crosspoint Intel® FPGA IP 25. Genlock Signal Router Intel® FPGA IP 26. Guard Bands Intel® FPGA IP 27. Interlacer Intel® FPGA IP 28. Mixer Intel® FPGA IP 29. Pixels in Parallel Converter Intel® FPGA IP 30. Scaler Intel® FPGA IP 31. Stream Cleaner Intel® FPGA IP 32. Switch Intel® FPGA IP 33. Tone Mapping Operator Intel® FPGA IP 34. Test Pattern Generator Intel® FPGA IP 35. Video and Vision Monitor Intel FPGA IP 36. Video Frame Buffer Intel® FPGA IP 37. Video Frame Reader Intel FPGA IP 38. Video Frame Writer Intel FPGA IP 39. Video Streaming FIFO Intel® FPGA IP 40. Video Timing Generator Intel® FPGA IP 41. Warp Intel® FPGA IP 42. Design Security 43. Document Revision History for Video and Vision Processing Suite User Guide

19.5. FIR Filter Registers

Each register is either read-only (RO) or read-write (RW).
Address Register Access Description
Lite 50 Full
Parameterization registers
0x0000 PROD_ID RO

Read this register to retrieve the FIR Filter product ID.

This register always returns 0x6FA7_022C.

0x0004 VER RO

Read this register to retrieve the version information for the FIR Filter.

0x0008 LITE_MODE RO

Read this register to determine if lite mode is on.

This register returns 0 for full mode and 1 for lite mode.

0x000C DEBUG_ENABLED RO

Read this register to determine if Debug features is on.

This register returns 0 for off and 1 for on.

0x0010 MAX_FRAME_WIDTH RO Read this register to determine the maximum supported input field width.
0x0014 MAX_FRAME_HEIGHT RO Read this register to determine the maximum supported input field height.
0x0018 BPS_IN RO Read this register to determine the bits per symbol for the input data.
0x001C BPS_OUT RO Read this register to determine the bits per symbol for the output data.
0x0020 ROUNDING_METHOD RO

Read this register to determine how the IPremoves the fractional bits when converting output result back to integer format.

  • 1: Round half up
  • 2: Round half even
  • 3: Truncate to integer
0x0024 BINARY_POINT_SHIFT RO Read this register to determine the number of places by which the binary point moves to the right. Use to scale the result of the calculation
0x0028 USE_FIXED_COEFF RO Read this register to determine if the IP is set to use a fixed coefficient file. This register returns 0 for false and 1 for true.
0x002C H_TAPS RO Read this register to determine the number of horizontal filter taps.
0x0030 V_TAPS RO Read this register to determine the number of vertical filter taps.
0x0034 HORIZONTAL_SYM_COEFFS RO Read this register to determine if horizontal kernel mirroring is on. This register returns 0 for false and 1 for true.
0x0038 VERTICAL_SYM_COEFFS RO Read this register to determine if vertical kernel mirroring is on. This register returns 0 for false and 1 for true.
0x003C DIAGONAL_SYM_COEFFS RO Read this register to determine if diagonal kernel mirroring is on. This register returns 0 for false and 1 for true
0x0040 SIGNED_COEFFS RO Read this register to determine whether the filter uses signed coefficients. This register returns 0 for unsigned and 1 for signed
0x0044 COEFF_INT_BITS RO Read this register to determine the number of integer bits that the fixed-point data type uses to store coefficients
0x0048 COEFF_FRAC_BITS RO Read this register to determine the number of fractional bits that the fixed-point data type uses to store coefficients
0x004C COEFFS_RUNTIME_LOAD RO Read this register to determine if updates to the coefficients at runt ime via the Avalon memory-mapped agent interface are supported. Returns 1 if updates are supported and 0 otherwise.
0x0050 to 0x011F - - Unused.
Control and debug registers

For more information, refer to Control Packets

0x0120 IMG_INFO_WIDTH RW RO

When you turn on lite mode, use this register to set the expected width of incoming video fields.

When you turn off Lite mode and turn on Debug features, this register returns the width that the FIR Filter derives from information in the image information packet

0x0124 IMG_INFO_HEIGHT RW RO

When you turn on lite mode, use this register to set the expected height of incoming video fields.

When you turn off Lite mode and turn on Debug features, this register returns the height that the FIR Filter derives from information in the image information packet.

0x0128 IMG_INFO_INTERLACE RO RO

When you turn on Lite Mode, set the expected interlaced properties of incoming video fields in this register. Set bit 3 of the register to indicate interlaced video and to enable propagation of the F0/F1 tuser bit.

When you turn off Lite mode and turn on Debug features, this register returns the interlace nibble that the FIR Filter derives from information in the image information packet.

0x012C RESERVED - - Unused.
0x0130 IMG_INFO_COLORSPACE - RO When you turn off Lite mode and turn on Debug features, this register returns the color space that the FIR Filter derives from information in the image information packet. Unused in lite mode.
0x0134 IMG_INFO_SUBSAMPLING - RO

When you turn off Lite mode and turn on Debug features, this register returns the subsampling that the FIR Filter derives from information in the image information packet. Unused in lite mode.

0x0138 IMG_INFO_COSITING - RO

When you turn off Lite mode and turn on Debug features, this register returns the cositing that the FIR Filter derives from information in the image information packet. Unused in lite mode.

0x013C IMG_INFO_FIELD_COUNT - RO

When you turn off Lite mode and turn on Debug features, this register returns the field count that the FIR Filter derives from information in the image information packet. Unused in lite mode.

0x0140 STATUS RO RO
  • Bit 0: Status bit. 1 means FIR Filter is processing a video field, 0 otherwise.
  • Bit 2: Algo core Idle. 1 indicates algorithmic core is finished processing all lines and it is safe to update coefficient values.
0x0144 to 0x0200 - - - Unused

0x0200 to 0x0200 + 4*(Number of coefficients-1)

COEFFICIENTS WO WO Up to [V_TAPS * H_TAPS] number of registers that set the new coefficient values. The coefficients apply to the filter kernel in raster scan order. Only available if COEFFS_RUNTIME_LOAD is on.

Register Bit Descriptions

Table 304.   VID_PID
Name Bits Description
FIR Filter vendor ID and product ID 31:0

This register always returns 0x6AF7_022C.

  • 15:0 is the product ID and always returns 0x022C
  • 31:16 is the vendor ID and always returns 0x6AF7
Table 305.   VERSION
Name Bits Description
Register map version 7:0 Register map version. Returns 0x02.
QPDS patch revision 15:8 Returns 0x00
QPDS update revision 23:16 Updated for each release. For 23.1, returns 0x01
QPDS major revision 31:24 Updated for each release. For 23.1, returns 0x17.
Table 306.   LITE_MODE
Name Bits Description
Lite mode parameterization bit 0 Returns 1 if you turn on lite mode.
Unused 31:1 Unused.
Table 307.   DEBUG_ENABLED
Name Bits Description
Debug features parameterization bit 0 Returns 1 if you turn on Debug features.
Unused 31:1 Unused.
Table 308.   MAX_FRAME_WIDTH
Name Bits Description
Maximum input width 31:0 Maximum supported input field width.
Table 309.   MAX_FRAME_HEIGHT
Name Bits Description
Maximum input height 31:0 Maximum supported input field height.
Table 310.   BPS_IN
Name Bits Description
BPS_IN 31:0 Returns the value of the BPS_IN parameter, indicating the bit per symbol the input interface is configured for.
Table 311.   BPS_OUT
Name Bits Description
BPS_OUT 31:0 Returns the value of the BPS_OUT parameter, indicating the bit per symbol the output interface is configured for.
Table 312.   ROUNDING_METHOD
Name Bits Description
Round method 31:0

Returns the value of the round method parameter, indicating method used to round excess fractional bits from the result.

  • 1: Round half up
  • 2: Round half even
  • 3: Truncate to integer
Table 313.   BINARY_POINT_SHIFT
Name Bits Description
Binary point shift 31:0 Returns the value of the move binary point parameter, indicating the number of places to the right the binary point is shifted by when scaling the result. A negative value indicates a shift to the left.
Table 314.   USE_FIXED_COEFF
Name Bits Description
Using a fixed coeff file. 31:0 Returns 1 if Coefficient initialization file is on, indicating the core uses a hex file to assign coefficient values on reset. 0 otherwise.
Table 315.   H_TAPS
Name Bits Description
Horizontal filter taps 31:0 Returns the number of horizontal filter taps.
Table 316.   V_TAPS
Name Bits Description
Vertical filter taps 31:0 Returns the number of vertical filter taps.
Table 317.   HORIZONTAL_SYM_COEFFS
Name Bits Description
Horizontal symmetry coefficients 31:0 Returns 1 if Horizontal kernel mirroring is on and 0 otherwise.
Table 318.   VERTICAL_SYM_COEFFS
Name Bits Description
Vertical symmetry coefficients 31:0 Returns 1 if Vertical kernel mirroring is on and 0 otherwise.
Table 319.   DIAGONAL_SYM_COEFFS
Name Bits Description
Diagonal symmetry coefficients 31:0 Returns 1 if Diagonal kernel mirroring is on and 0 otherwise.
Table 320.   SIGNED_COEFFS
Name Bits Description
Signed coefficients 31:0 Returns 1 if filter coefficients are signed values and 0 otherwise.
Table 321.   COEFF_INT_BITS
Name Bits Description
Coefficient integer bits 31:0 Returns the number of integer bits that represent the filter coefficients.
Table 322.   COEFF_FRAC_BITS
Name Bits Description
Coefficient fractional bits 31:0 Returns the number of fractional bits that represent the filter coefficients.
Table 323.   COEFFS_RUNTIME_LOAD
Name Bits Description
Coefficient runtime load 31:0 Returns 1 if Update coefficients at runtime is on and 0 otherwise.
Table 324.   IMG_INFO_WIDTH
Name Bits Description
Width bits 15:0

When Lite mode is on, write to this register to set the expected width of the incoming video fields.

When Lite mode is off and Debug features is on, this register returns the width-1field from the most recently received image information packet and adds 1 to return a value for width.

unused 31:16 Unused.
Table 325.   IMG_INFO_HEIGHT
Name Bits Description
Heightbits 15:0

When lite mode is on, write to this register to set the expected height of the incoming video fields.

When Lite mode is off and Debug features is on, this register reads the height-1field from the most recently received image information packet and adds 1 to return a value for height.

unused 31:16 Unused.
Table 326.   IMG_INFO_INTERLACE
Name Bits Description
IntlaceNibble bits 3:0

When Lite mode is on, write to this register to set expected interlace properties of incoming video field. Set bit 3 of the register to indicate interlaced video and to enable propagation of the F0/F1 tuser bit.

When Lite mode is off with Debug features on, this register returns the intlaceNibble field from the most recently received image information packet.

unused 31:4 Unused.
Table 327.   IMG_INFO_COLORSPACE
Name Bits Description
CSP code bits 6:0

When Lite mode is on, this register has no function.

When you turn off Lite mode and turn on Debug features, this register returns the 7 bit CSP field from the most recently received image information packet.

unused 31:7 Unused.
Table 328.   IMG_INFO_SUBSAMPLING
Name Bits Description
SubSa code bits 1:0

When Lite mode is on, this register has no function.

When Lite mode is off with Debug features on, this register returns the SUBSAfield from the most recently received image information packet.

unused 31:2 Unused.
Table 329.   IMG_INFO_COSITING
Name Bits Description
Cosite code bits 1:0

When you turn on Lite mode, write to this register to set the expected chroma co-siting of the incoming video fields.

When you turn off Lite mode and turn on Debug features, this register returns the COSITE field from the most recently received image information packet.

unused 31:2 Unused.
Table 330.   IMG_INFO_FIELD_COUNT
Name Bits Description
Count bits 6:0

When you turn on Lite mode, this register has no function.

When you turn off Lite mode and turn on Debug features, this register returns the 7 bit FIELD_COUNT field from the most recently received image information packet.

unused 31:7 Unused.
Table 331.   STATUS
Name Bits Description
Status bit 0 1 indicates FIR filter is processing a video field, 0 otherwise.
Reserved 1 Reserved
Algo core idle 2 1 indicates algorithmic core is finished processing all lines and it is safe to update coefficient values. 0 otherwise.
Unused 31:3 Unused
Table 332.   COEFFICIENTS_X
Name Bits Description
Coefficient value Coefficient_width-1:0 Coefficient value for filter tap X
Unused 31:coefficient_width
50

When you turn on lite mode, registers are RW only if you turn on Debug features, otherwise they are WO. For full, turn off lite mode.