Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 10/02/2023
Public
Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. AXI-Stream Broadcaster Intel® FPGA IP 10. Bits per Color Sample Adapter Intel FPGA IP 11. Chroma Key Intel® FPGA IP 12. Chroma Resampler Intel® FPGA IP 13. Clipper Intel® FPGA IP 14. Clocked Video Input Intel® FPGA IP 15. Clocked Video to Full-Raster Converter Intel® FPGA IP 16. Clocked Video Output Intel® FPGA IP 17. Color Space Converter Intel® FPGA IP 18. Deinterlacer Intel® FPGA IP 19. FIR Filter Intel® FPGA IP 20. Frame Cleaner Intel® FPGA IP 21. Full-Raster to Clocked Video Converter Intel® FPGA IP 22. Full-Raster to Streaming Converter Intel® FPGA IP 23. Genlock Controller Intel® FPGA IP 24. Generic Crosspoint Intel® FPGA IP 25. Genlock Signal Router Intel® FPGA IP 26. Guard Bands Intel® FPGA IP 27. Interlacer Intel® FPGA IP 28. Mixer Intel® FPGA IP 29. Pixels in Parallel Converter Intel® FPGA IP 30. Scaler Intel® FPGA IP 31. Stream Cleaner Intel® FPGA IP 32. Switch Intel® FPGA IP 33. Tone Mapping Operator Intel® FPGA IP 34. Test Pattern Generator Intel® FPGA IP 35. Video and Vision Monitor Intel FPGA IP 36. Video Frame Buffer Intel® FPGA IP 37. Video Frame Reader Intel FPGA IP 38. Video Frame Writer Intel FPGA IP 39. Video Streaming FIFO Intel® FPGA IP 40. Video Timing Generator Intel® FPGA IP 41. Warp Intel® FPGA IP 42. Design Security 43. Document Revision History for Video and Vision Processing Suite User Guide

17.4. Color Space Converter IP Registers

Each register is either read-only (RO) or read-write (RW).
In the software API the register names appear with a prefix of INTEL_VVP, INTEL_VVP_CORE or INTEL_VVP_CSC as appropriate and with an optional REG suffix
Address Register Access Description
Lite 41 Full
Parameterization registers
0x0000 VID_PID RO RO

Read this register to retrieve the Color Space Converter product ID.

This register always returns 0x6AF7_022F.

0x0004 VERSION RO RO

Read this register to retrieve the version information for Color Space Converter.

0x0008 LITE_MODE RO RO

Read this register to determine if Lite mode is on.

This register returns 0 when Lite mode is off and 1 when Lite mode is on.

0x000C DEBUG_ENABLED RO RO

Read this register to determine if Debug features is on.

This register returns 0 for off and 1 for on.

0x0010 BPS_IN RO RO

Read this register to determine the bits per symbol configured for the input data.

Range [8 : 16].

0x0014 BPS_OUT RO RO

Read this register to determine the bits per symbol configured for the output data.

Range [8 : 16].

0x0018 FRAC_BITS RO RO

Read this register to determine the number of fractional bits used by the fixed-point data type to store the coefficients and summands

Range [0 : 31].

0x001C COEFFS_SIGNED RO RO

Read this register to determine if the coefficient fixed-point type has a signed bit.

(0 – unsigned, 1 - signed).

0x0020 COEFFS_INT_BITS RO RO

Read this register to determine the number of integer bits used by fixed-point data type to store coefficients.

Range [0 : 16].

0x0024 SUMMANDS_SIGNED RO RO

Read this register to determine if the summand fixed-point type has a signed bit.

(0 – unsigned, 1 - signed).

0x0028 SUMMANDS_INT_BITS RO RO

Read this register to determine the number of integer bits used by fixed-point data type to store summands.

Range [0 : 20].

0x002C BINARY_POINT_RIGHT_MOVE RO RO

Read this register to determine the number of places by which the binary point moves to the right. Use to scale the result of the calculation.

Range [-16 : 16].

0x0030 ROUND_METHOD RO RO

Read this register to determine the method to remove the fractional bits when converting output result back to integer format.

1: Round half up

2: Round half even

3: Truncate to integer

0x0034 to 0x011F - - - Unused.

Control and debug registers

For more information, refer to Control Packets

0x0120 IMG_INFO_WIDTH RW RO When Lite mode is on, the expected width of the incoming video fields. When Lite mode is off, the received width in image information packets.
0x0124 IMG_INFO_HEIGHT RW RO When Lite mode is on, the expected height of the incoming video fields. When Lite mode is off, the received height in image information packets.
0x0128 IMG_INFO_INTERLACE RW RO When Lite mode is on, the expected interlace information of the incoming video fields. When Lite mode is off, the received interlace information in image information packets.
0x012C RESERVED RW RO Unused.
0x0130 IMG_INFO_COLORSPACE RW RO When Lite mode is on, the expected color space of the incoming video fields. When Lite mode is off, the received color space in image information packets.
0x0134 IMG_INFO_SUBSAMPLING RW RO When Lite mode is on, the expected chroma sub-sampling of the incoming video fields. When Lite mode is off, the received chroma sub-sampling in image information packets.
0x0138 IMG_INFO_COSITING RW RO When Lite mode is on, the expected chroma co-siting of the incoming video fields. When Lite mode is off, the received chroma co-siting in image information packets.
0x013C IMG_INFO_FIELD_COUNT - RO The received field count field in image information packets.
0x0140 STATUS RO RO

Bit 0: Status bit.

1 means Color Space Converter is processing a video field, 0 otherwise.

When Lite mode is off:

Bit 1 : Pending register updates bit.

Any writes to the color space converter specification registers (0x0148 - 0x0178) cause the IP to raise the pending register updates bit, to indicate outstanding changes to the color space converter settings.

The IP lowers this bit at the start of the first packet for a new frame (first packet after the end of packet) after a write to the COMMIT register.

0x0144 COMMIT RW RW

The IP uses this register with the STATUS register pending register updates bit.

Write any value to this register after writing new values to any of the color space converter specification registers (0x0148 - 0x0178). The color space converter switches to the new color space converter specification values at the start of the next video frame after you write to this register.

The commit register ensures atomic register updates, avoiding the IP only applying some of the updated register values before the next incoming frame

Specification registers
0x0148 Coefficient A0 RW RW Write to these registers to set the coefficient and summand values. The coefficients and summands are stored in the format indicated by the IP’s parameters. The coefficient and summand registers use integer numbers, with specified number of integer and fractional bits. If signed representation is on, the IP uses signed 2’s complement.
0x014C Coefficient B0
0x0150 Coefficient C0
0x0154 Coefficient A1
0x0158 Coefficient B1
0x015C Coefficient C1
0x0160 Coefficient A2
0x0164 Coefficient B2
0x0168 Coefficient C2
0x016C Summand S0
0x0170 Summand S1
0x0174 Summand S2
0x0178 Output Color Space RW RW Only applicable when Lite mode is off. Write to this register to set the value of color space field in outgoing image information packets from the Color Space Converter. Refer to the Intel FPGA Streaming Video Protocol Specification for more information about color space encoding and image information packets.

Register Bit Descriptions

Table 249.   VID_PID
Name Bits Description
Color Space Converter version ID and product ID 31:0 This register always returns 0x6AF7_022F.
  • 15:0 is the product ID and always returns 0x022F
  • 31:16 is the vendor ID and always returns 0x6AF7
Table 250.   VERSION
Name Bits Description
Register map version 7:0 Register map version. Returns 0x01.
QPDS patch revision 15:8 Returns 0x00.
QPDS update revision 23:16 Updated for each release. For 21.4 returns 0x04
QPDS major revision 31:24 Updated for each release. For 21.4 returns 0x15.
Table 251.   LITE_MODE
Name Bits Description
Lite mode parameterization bit 0 Returns 1 if lite mode is on.
Unused 31:1 Unused.
Table 252.   DEBUG_ENABLED
Name Bits Description
Debug features parameterization bit 0 Returns 1 if debug features is on.
Unused 31:1 Unused.
Table 253.   BPS_IN
Name Bits Description
BPS_IN 15:0 Returns the value of the BPS_IN parameter, indicating the bit per symbol the input interface is configured for.
Unused 31:16 Unused.
Table 254.   BPS_OUT
Name Bits Description
BPS_OUT 15:0 Returns the value of the BPS_OUT parameter, indicating the bit per symbol the output interface is configured for.
Unused 31:16 Unused.
Table 255.   FRAC_BITS
Name Bits Description
Coefficient and summand fractional bits 15:0 Returns the value of the coefficient and summand fractional bits parameter, indicating the number of fractional bits used by the fixed-point data type to store the coefficients and summands.
Unused 31:16 Unused.
Table 256.   COEFFS_SIGNED
Name Bits Description
Coefficients signed 15:0 Returns the value of the coefficient signed parameter indicating coefficients are stored in a signed format.
Unused 31:16 Unused.
Table 257.   COEFFS_INT_BITS
Name Bits Description
Coefficient integer bits 15:0 Returns the value of the coefficient integer bits parameter, indicating number of integer bits used by fixed-point format to represent coefficients.
Unused 31:16 Unused.
Table 258.   SUMMANDS_SIGNED
Name Bits Description
Summands signed 15:0 Returns the value of the summands signed parameter indicating summands are stored in a signed format.
Unused 31:16 Unused.
Table 259.   SUMMANDS_INT_BITS
Name Bits Description
Summand integer bits 15:0 Returns the value of the summand integer bits parameter, indicating number of integer bits used by fixed-point format to represent summands.
Unused 31:16 Unused.
Table 260.   BINARY_POINT_RIGHT_MOVE
Name Bits Description
Binary point right move 15:0 Returns the value of the move binary point right parameter, indicating the number of places the binary point is shifted by when scaling the result.
Unused 31:16 Unused.
Table 261.   ROUND_METHOD
Name Bits Description
Round method 15:0

Returns the value of the round method parameter, indicating method used to round excess fractional bits from the result.

1: Round half up

2: Round half even

3: Truncate to integer

Unused 31:16 Unused.
Table 262.   IMG_INFO_WIDTH
Name Bits Description
Width bits 15:0

When Lite mode is on, write to this register to set the expected width of the incoming video fields.

When Lite mode is off with Debug features on, this register returns the width field from the most recently received.

unused 31:16 Unused.
Table 263.   IMG_INFO_HEIGHT
Name Bits Description
Height bits 15:0

When Lite mode is on, write to this register to set the expected height of the incoming video fields.

When Lite mode is off with Debug features on, this register returns the height field from the most recently received. image information packet.

unused 31:16 Unused.
Table 264.   IMG_INFO_INTERLACE
Name Bits Description
interlaced bits 3:0

When Lite mode is on, write to this register to set the expected interlacing of the incoming video fields.

When Lite mode is off with Debug features on, this register returns the intlaceNibble field from the most recently received image information packet.

unused 31:4 Unused.
Table 265.   IMG_INFO_COLORSPACE
Name Bits Description
Colorspace code bits 6:0

When Lite mode is on, write to this register to set the expected color space of the incoming video fields.

When Lite mode is off with Debug features on, this register returns the CSP field from the most recently received image information packet.

unused 31:7 Unused.
Table 266.   IMG_INFO_SUBSAMPLING
Name Bits Description
Subsampling code bits 1:0

When Lite mode is on, write to this register to set the expected chroma sub-sampling of the incoming video fields.

When Lite mode is off with Debug features on, this register returns the SUBSA field from the most recently received image information packet.

unused 31:2 Unused.
Table 267.   IMG_INFO_COSITING
Name Bits Description
Cosite code bits 1:0

When Lite mode is on, write to this register to set the expected chroma co-siting of the incoming video fields.

When Lite mode is off with Debug features on, this register returns the COSITE field from the most recently received image information packet.

unused 31:2 Unused.
Table 268.   STATUS
Name Bits Description
Status bit 0 1 means the Color Space Converter is processing a video field, 0 otherwise.
Pending register updates bit 1 1 means the Color Space Converter has pending updates, 0 otherwise.
Table 269.   COMMIT
Name Bits Description
Commit bits 31:0 Write to any bits to trigger a commit.
Table 270.   COEFFICIENT_VALUE
Name Bits Description
Coefficient_value (Coeff_signed + coeff_int_bits + Coeff_sum_frac_bits):0 This block of registers allows the setting of coefficient. The coefficients are represented by fixed-point format, and are determined by the IP’s parameterization.
Table 271.   SUMMAND_VALUES
Name Bits Description
Summand_value (Summand_signed + summand_int_bits + Coeff_sum_frac_bits):0 This block of registers allows the setting of summand. The summands are represented by fixed-point format, and are determined by the IP’s parameterization.
Table 272.   OUTPUT_COLORSPACE
Name Bits Description
Output Colorspace 6:0 Write to this register to set the color space code for outgoing image information packets when you turn off Lite mode. Refer to Intel FPGA Streaming Video Protocol Specification for more details on color space field of image information packets.
41

When you turn on lite mode, registers are RW only if you turn on Debug features, otherwise they are WO. For full, turn off lite mode.