Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 10/02/2023
Public

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Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. AXI-Stream Broadcaster Intel® FPGA IP 10. Bits per Color Sample Adapter Intel FPGA IP 11. Chroma Key Intel® FPGA IP 12. Chroma Resampler Intel® FPGA IP 13. Clipper Intel® FPGA IP 14. Clocked Video Input Intel® FPGA IP 15. Clocked Video to Full-Raster Converter Intel® FPGA IP 16. Clocked Video Output Intel® FPGA IP 17. Color Space Converter Intel® FPGA IP 18. Deinterlacer Intel® FPGA IP 19. FIR Filter Intel® FPGA IP 20. Frame Cleaner Intel® FPGA IP 21. Full-Raster to Clocked Video Converter Intel® FPGA IP 22. Full-Raster to Streaming Converter Intel® FPGA IP 23. Genlock Controller Intel® FPGA IP 24. Generic Crosspoint Intel® FPGA IP 25. Genlock Signal Router Intel® FPGA IP 26. Guard Bands Intel® FPGA IP 27. Interlacer Intel® FPGA IP 28. Mixer Intel® FPGA IP 29. Pixels in Parallel Converter Intel® FPGA IP 30. Scaler Intel® FPGA IP 31. Stream Cleaner Intel® FPGA IP 32. Switch Intel® FPGA IP 33. Tone Mapping Operator Intel® FPGA IP 34. Test Pattern Generator Intel® FPGA IP 35. Video and Vision Monitor Intel FPGA IP 36. Video Frame Buffer Intel® FPGA IP 37. Video Frame Reader Intel FPGA IP 38. Video Frame Writer Intel FPGA IP 39. Video Streaming FIFO Intel® FPGA IP 40. Video Timing Generator Intel® FPGA IP 41. Warp Intel® FPGA IP 42. Design Security 43. Document Revision History for Video and Vision Processing Suite User Guide

35.4. Video and Vision Monitor IP Registers

Each register is either read-only (RO) or read-write (RW).

Table 641.  Video and Vision Monitor IP Registers

In the software API these register names appear with a prefix of INTEL_VVP, INTEL_VVP_CORE or INTEL_VVP_SNOOP as appropriate and with an optional REG suffix

Address Register Access Description
Lite Full
Parameterization registers
0x0000 PROD_ID RO

Read this register to retrieve the Video and Vision Monitor product ID.

This register always returns 0x6AF7_0248.

0x0004 VER RO

Read this register to retrieve the version information for Video and Vision Monitor.

0x0008 LITE_MODE RO

Read this register to determine if Lite mode is on.

This register returns 1 if Lite mode is on and 0 if Lite mode is off

0x000C DEBUG_ENABLED RO

This register always returns 1 as this debugging IP always has debug features on

0x0010 PIXELS_IN_PARALLEL RO Read this register to determine the number of pixels processed per clock cycle.
0x0014 to 0x011F unused

Control and debug registers

Refer to Image Information Packets in the Intel FPGA Streaming Video Protocol Specification for more details of these registers

0x0120 IMG_INFO_WIDTH RW RO

When lite mode is on, use this register to set the expected width of incoming video fields.

When lite mode is off, this register returns the width that the IP derives from information in the image information control packet.

0x0124 IMG_INFO_HEIGHT RW RO

When lite mode is on, use this register to set the expected height of incoming video fields.

When lite mode is off, this register returns the height that the IP derives from information in the image information control packet.

0x0128 IMG_INFO_INTERLACE - RO When lite mode is off, this register returns the interlace nibble that the IP derives from information in the image information control packet. Unused when lite mode is on.
0x012C Reserved - - Reserved
0x0130 IMG_INFO_COLORSPACE - RO When lite mode is off, this register returns the color space that the IP derives from information in the image information control packet. Unused when lite mode is on.
0x0134 IMG_INFO_SUBSAMPLING RW RO

When lite mode is on, use this register to set the expected subsampling of incoming video fields.

When lite mode is off, this register returns the subsampling that the IP derives from information in the image information control packet

0x0138 IMG_INFO_COSITING - RO When lite mode is off, this register returns the cositing that the IP derives from information in the image information control packet.
0x013C IMG_INFO_FIELD_COUNT - RO When lite mode is off, this register returns the field count that the IP derives from information in the image information control packet.
0x0138 to 0x013C unused
0x0140 STATUS RO

Bit 0 : Status bit.

1 = IP is processing a video field, 0 otherwise. For other bits, see Table 21

0x0144 NUM_GOOD_FIELDS RO Reports the number of fields received which matched their expected size since the counters were last reset. When lite mode is on, this count excludes any fields for which the end-of-field control packet sets its broken field flag.
0x0148 NUM_BROKEN_FIELDS RO When lite mode is on, this register reports the number of fields received since the counters were last reset for which the end-of-field control packet set its broken field flag. Unused when Lite mode is on.
0x014C NUM_MISMATCH_FIELDS RO Reports the number of fields received that do not match their expected size since the IP last reset the counters.
0x0150

LAST_NUM_LINES

RO Reports the number of lines in the last field received.
0x0154 LAST_MIN_WIDTH RO Reports the minimum width of any line received as part of the last field.
0x0158 LAST_MAX_WIDTH RO Reports the maximum width of any line received as part of the last field.
0x015C RESERVED - Reserved
0x0160 RESET_COUNTERS RW Write any value to this register to reset all debug counts to 0.

Register Bit Descriptions

Table 642.  PROD_ID
Name Bits Description
Video and Vision Monitor product ID 31:0 This register always returns 0x6AF7_0248.
Table 643.  VER
Name Bits Description
Register map version 7:0 Register map version. Returns 0x01.
Unused 15:8 Unused. Returns 0x04
QPDS minor revision 23:16 Updated for each release. For 22.2, returns 0x02
QPDS major revision 31:24 Updated for each release. For 22.2, returns 0x16.
Table 644.  LITE_MODE
Name Bits Description
Lite mode parameterization 31:0 Returns 1 if lite mode is on. 0 otherwise
Table 645.  DEBUG_ENABLED
Name Bits Description
Debug features parameterization 31:0 Always returns 1
Table 646.   PIXELS_IN_PARALLEL
Name Bits Description
Pixels in parallel 31:0 Number of pixels processed per clock cycle
Table 647.  IMG_INFO_WIDTH
Name Bits Description
Width bits 15:0

When lite mode is on, write to this register to set the expected width of the incoming video fields.

When lite mode is off, this register returns the width-1 field from the most recently received image information packet and adds 1 to return a value for width.

Unused 31:16 Unused
Table 648.  IMG_INFO_HEIGHT
Name Bits Description
Height bits 15:0

When lite mode is on, write to this register to set the expected height of the incoming video fields.

When lite mode is off, this register reads the height-1 field from the most recently received image information packet and adds 1 to return a value for height.

Unused 31:16 Unused
Table 649.  IMG_INFO_INTERLACE
Name Bits Description
IntlaceNibble bits 3:0

When lite mode is on, this register has no function.

When lite mode is off, this register returns the intlaceNibble field from the most recently received image information packet.

Unused 31:4 Unused
Table 650.  IMG_INFO_COLORSPACE
Name Bits Description
CSP code bits 6:0

When lite mode is on, this register has no function.

For full variants, this register returns the 7 bit CSP field from the most recently received image information packet

Unused 31:7 Unused
Table 651.  IMG_INFO_SUBSAMPLING
Name Bits Description
SubSa code bits 1:0

When lite mode is on, write to this register to set the expected subsampling of the incoming video fields.

When lite mode is off, this register returns the SUBSA field from the most recently received image information packet.

Unused 31:2 Unused
Table 652.  IMG_INFO_COSITING
Name Bits Description
Cosite code bits 1:0

When lite mode is on, this register has no function.

When lite mode is off, this register returns the COSITE field from the most recently received image information packet.

Unused 31:2 Unused
Table 653.  IMG_INFO_FIELD_COUNT
Name Bits Description
Count bits 6:0

When lite mode is on, this register has no function.

When lite mode is off, this register returns the 7 bit FIELD_COUNT field from the most recently received image information packet.

Unused 31:7 Unused
Table 654.  STATUS
Name Bits Description
Status bit 0 1 = Video and Vision Monitor is processing a video field, 0 otherwise.
Unused 31:1 Unused
Table 655.  NUM_GOOD_FIELDS
Name Bits Description

Number of good fields

15:0 Number of fields received since last reset of counters that match their expected dimensions. When lite mode is off, do not have the broken field flag set in their end-of-field control packets.
Unused 31:16 Unused
Table 656.  NUM_BROKEN_FIELDS
Name Bits Description

Number of broken

15:0 Number of fields received since last reset of counters that have the broken field flag set in their end-of-field control packets. Lite mode off only.
Unused 31:16 Unused
Table 657.  NUM_MISMATCH_FIELDS
Name Bits Description
Number of mismatch fields 15:0 Number of fields received since last reset of counters that do not match their expected dimensions.
Unused 31:16 Unused
Table 658.  LAST_NUM_LINES
Name Bits Description
Number of lines 16:0 Number of lines in the last field received.
Unused 31:17 Unused
Table 659.  LAST_MIN_WIDTH
Name Bits Description
Minimum line width 16:0 Minimum number of pixels per line in the last field received.
Unused 31:17 Unused
Table 660.  LAST_MAX_WIDTH
Name Bits Description
Maximum line width 16:0 Maximum number of pixels per line in the last field received
Unused 31:17 Unused
Table 661.  RESET_COUNTERS
Name Bits Description
Reset counter 31:0 Write any value to this register to reset the frame counts.