Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 10/02/2023
Public

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Document Table of Contents
1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. AXI-Stream Broadcaster Intel® FPGA IP 10. Bits per Color Sample Adapter Intel FPGA IP 11. Chroma Key Intel® FPGA IP 12. Chroma Resampler Intel® FPGA IP 13. Clipper Intel® FPGA IP 14. Clocked Video Input Intel® FPGA IP 15. Clocked Video to Full-Raster Converter Intel® FPGA IP 16. Clocked Video Output Intel® FPGA IP 17. Color Space Converter Intel® FPGA IP 18. Deinterlacer Intel® FPGA IP 19. FIR Filter Intel® FPGA IP 20. Frame Cleaner Intel® FPGA IP 21. Full-Raster to Clocked Video Converter Intel® FPGA IP 22. Full-Raster to Streaming Converter Intel® FPGA IP 23. Genlock Controller Intel® FPGA IP 24. Generic Crosspoint Intel® FPGA IP 25. Genlock Signal Router Intel® FPGA IP 26. Guard Bands Intel® FPGA IP 27. Interlacer Intel® FPGA IP 28. Mixer Intel® FPGA IP 29. Pixels in Parallel Converter Intel® FPGA IP 30. Scaler Intel® FPGA IP 31. Stream Cleaner Intel® FPGA IP 32. Switch Intel® FPGA IP 33. Tone Mapping Operator Intel® FPGA IP 34. Test Pattern Generator Intel® FPGA IP 35. Video and Vision Monitor Intel FPGA IP 36. Video Frame Buffer Intel® FPGA IP 37. Video Frame Reader Intel FPGA IP 38. Video Frame Writer Intel FPGA IP 39. Video Streaming FIFO Intel® FPGA IP 40. Video Timing Generator Intel® FPGA IP 41. Warp Intel® FPGA IP 42. Design Security 43. Document Revision History for Video and Vision Processing Suite User Guide
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18.5. Deinterlacer IP Software API

The IP has a software driver for software control of the IP at run time. The IP does not fit any of the generic device models provided by the Nios II HAL. It exposes a set of dedicated accessors to the control and status registers. The driver structure inherits the base driver structure so all common methods described in Video and Vision Processing IPs Software API are applicable.

Register definition header file: intel_vvp_dil_regs.h

Include file: intel_vvp_dil.h

Table 297.  Deinterlacer IP Software API
Name Description
intel_vvp_dil_init Initialize the Deinterlacer instance
Intel_vvp_core_* Accessors defined in Video and Vision Processing IPs Software Programming Model
intel_vvp_dil_get_lite_mode Returns lite mode is on
intel_vvp_dil_get_debug_enabled Returns debug features is on.
Intel_vvp_dil_get_max_width Returns the maximum supported width
intel_vvp_dil_get_dil_algorithm Returns the deinterlacing algorithm
intel_vvp_dil_get_field_sync Returns the field synchronization method
intel_vvp_dil_get_mem_base_address Returns the base address (weave deinterlacing)
intel_vvp_dil_get_mem_buff_line_stride Returns the line stride (weave deinterlacing)
intel_vvp_dil_get_bps Returns the Bits per sample value (weave deinterlacing)
intel_vvp_dil_get_num_colors Returns the Number of color planes value (weave deinterlacing)
intel_vvp_dil_get_pixels_in_parallel Returns the Pixels in parallel value (weave deinterlacing)
intel_vvp_dil_get_mem_packing Returns the Memory packing method (weave deinterlacing)
intel_vvp_dil_is_running Returns if the IP is processing data
intel_vvp_dil_get_status Reads the status register

enum eIntelVvpDilAlgorithms

Members

kIntelVvpDilBobAlgo (0) - Bob deinterlacing

kIntelVvpDilWeaveAlgo (1) - Weave deinterlacing

kIntelVvpDilAlgoErr (-1) - Invalid deinterlacing algorithm (used to indicate errors)

Description

Enumeration for the configurable deinterlacing algorithms

enum eIntelVvpDilMemPacking

Members

kIntelVvpDilPerfectPacking (0) - Perfect packing

kIntelVvpDilColorPacking (1) - Color packing

kIntelVvpDilPixelPacking (2) - Pixel packing

kIntelVvpDilPackingErr (-1) – Invalid value (used to indicate errors)

Description

Enumeration for the configurable memory packing algorithm

enum eIntelVvpDilFieldSyncs

Members

kIntelVvpDilDeinterlaceSyncF0 – Synchronization on F0 (input frame rate = output frame rate)

kIntelVvpDilDeinterlaceSyncF0 – Synchronization on F1 (input frame rate = output frame rate)

kIntelVvpDilDeinterlaceSyncBoth – Synchronization on F0 and F1 (input field rate = output frame rate)

Description
Enumeration for the three supported field-to-frame rate conversions

intel_vvp_dil_init

Prototype
 int intel_vvp_dil_init(intel_vvp_dil_instance *instance, intel_vvp_core_base base);
Description
Initializes a deinterlacer instance. The initialization stops early if the vendor ID or product ID read at the base address are not a match or if the register map version is not supported. Otherwise, the function proceeds to read and store the IP compile-time parameterization. The instance is not fully initialized and the application should not use it further if returning a non-zero error code.
Arguments
instance – pointer to the intel_vvp_dil_instance software driver instance structure

base – base address of the register map

Returns

kIntelVvpCoreOk (0) in case of success, a negative error code in case of error

kIntelVvpCoreVidErr if the vendor id of the core is not the IntelFPGA vendor ID (0x6AF7).

kIntelVvpCorePidErr if the product_id does not match with the Deinterlacer product ID

kIntelVvpCoreInstanceErr if the instance is a null pointer

kIntelVvpDilRegMapVersionErr if the register map is not supported

intel_vvp_dil_get_lite_mode

Prototype
bool intel_vvp_dil_get_lite_mode(intel_vvp_dil_instance *instance);
Description
Returns the value of the LITE_MODE register. The instance must be a valid intel_vvp_dil_instance fully initialized
Arguments
instance – pointer to the intel_vvp_dil_instance software driver instance structure
Returns
true if the IP is parameterized in lite mode

intel_vvp_dil_get_debug_enabled

Prototype
 bool intel_vvp_dil_get_debug_enabled(intel_vvp_dil_instance *instance);
Description
Returns the value of the DEBUG_ENABLED register. The instance must be a valid intel_vvp_dil_instance fully initialized.
Arguments
instance – pointer to the intel_vvp_dil_instance software driver instance structure
Returns
true if the IP is parameterized with debug features enabled

intel_vvp_dil_get_max_width

Prototype
uint32_t intel_vvp_dil_get_max_widh(intel_vvp_dil_instance *instance);
Description
Returns the value of the MAX_WIDTH register. The instance must be a valid intel_vvp_dil_instance fully initialized.
Arguments
instance – pointer to the intel_vvp_dil_instance software driver instance structure
Returns
Maximum supported width

intel_vvp_dil_get_dil_algorithm

Prototype
eIntelVvpDilAlgorithms_t intel_vvp_dil_get_dil_algorithm(intel_vvp_dil_instance *instance);
Description
Returns the value of the deinterlacing algorithm register. The instance must be a valid intel_vvp_dil_instance fully initialized.
Arguments
instance – pointer to the intel_vvp_dil_instance software driver instance structure
Returns
Deinterlacing algorithm selected at compile-time

intel_vvp_dil_get_field_sync

Prototype
eIntelVvpDilFieldSyncs intel_vvp_dil_get_field_sync(intel_vvp_dil_instance *instance);
Description
Returns the value of the field synchronization register. The instance must be a valid intel_vvp_dil_instance fully initialized.
Arguments
instance – pointer to the intel_vvp_dil_instance software driver instance structure
Returns
Field synchronization algorithm selected at compile-time

intel_vvp_dil_get_mem_base_address

Prototype
 uint32_t intel_vvp_dil_get_mem_base_address(intel_vvp_dil_instance *instance);
Description

Returns the value of the MEM_BASE_ADDR register. The instance must be a valid intel_vvp_dil_instance fully initialized and configured for weave deinterlacing.

Arguments

instance - pointer to the intel_vvp_dil_instance software driver instance structure

Returns

the storage buffer base address in memory

intel_vvp_dil_get_mem_buff_line_stride

Prototype
uint32_t intel_vvp_dil_get_mem_buff_line_stride(intel_vvp_dil_instance *instance);
Description

Returns the value of the MEM_BUFF_LINE_STRIDE register. The instance must be a valid intel_vvp_dil_instance fully initialized and configured for weave deinterlacing.

Arguments

instance - pointer to the intel_vvp_dil_instance software driver instance structure

Returns

the line stride used in the storage buffer

intel_vvp_dil_get_bps

Prototype
uint8_t intel_vvp_dil_get_bps(intel_vvp_dil_instance *instance);
Description

Returns the value of the BITS_PER_SAMPLE register. The instance must be a valid intel_vvp_dil_instance fully initialized and configured for weave deinterlacing.

Arguments

instance - pointer to the intel_vvp_dil_instance software driver instance structure

Returns

the number of bits per color sample

intel_vvp_dil_get_num_colors

Prototype
uint8_t intel_vvp_dil_get_num_colors(intel_vvp_dil_instance *instance);
Description

Returns the value of the NUM_COLOR_PLANES register. The instance must be a valid intel_vvp_dil_instance fully initialized and configured for weave deinterlacing.

Arguments

instance - pointer to the intel_vvp_dil_instance software driver instance structure

Returns

the number of color planes per pixel

intel_vvp_dil_get_pixels_in_parallel

Prototype
uint8_t intel_vvp_dil_get_pixels_in_parallel(intel_vvp_dil_instance *instance);
Description

Returns the value of the PIXELS_IN_PARALLEL register. The instance must be a valid intel_vvp_dil_instance fully initialized and configured for weave deinterlacing.

Arguments

instance - pointer to the intel_vvp_dil_instance software driver instance structure

Returns

the number of pixels streamed in parallel per beat

intel_vvp_dil_get_mem_packing

Prototype
eIntelVvpDilMemPacking intel_vvp_dil_get_mem_packing(intel_vvp_dil_instance *instance);
Description

Returns the value of the MEM_PACKING register. The instance must be a valid intel_vvp_dil_instance fully initialized and configured for weave deinterlacing.

Arguments

instance - pointer to the intel_vvp_dil_instance software driver instance structure

Returns

the memory packing method used to store fields in memory

intel_vvp_dil_is_running

Prototype
bool intel_vvp_ dil _is_running(intel_vvp_dil_instance* instance);
Description
Reads and returns the running bit of the STATUS register. The instance must be a valid intel_vvp_dil_instance fully initialized.
Arguments
instance – pointer to the intel_vvp_dil_instance software driver instance structure
Returns
True is the IP is currently generating an output field, false when between two fields

intel_vvp_dil_get_status

Prototype
uint8_t intel_vvp_dil_get_status(intel_vvp_dil_instance* instance);
Description
Reads and returns the STATUS register. The instance must be a valid intel_vvp_dil_instance fully initialized.
Arguments
instance – pointer to the intel_vvp_dil_instance software driver instance structure
Returns
The value read from the status register