2.11. Initial Value of Read and Write Address Registers
In Intel® Agilex™ devices, the M20K blocks does not have freeze register (frzreg) in hardware to clear the address registers after entering user mode. This results in a non-deterministic address value in hardware before you can send any valid address. Hence, the address registers have been initialized to ‘X’ in the simulation model.
The figure below is a waveform illustrating the behavior of the values of the address registers initialized to ‘X’ for a simple dual-port RAM with registered output.
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