Intel® FPGA SDK for OpenCL™: Intel® Stratix® 10 GX FPGA Development Kit Reference Platform Porting Guide

ID 683809
Date 3/28/2022
Public
Document Table of Contents

2.8. Intel® FPGA SDK for OpenCL™ Compilation Flows

The BSP contains scripts that facilitate all kernel compiles based on the revision, that is, flat, base or top. These scripts are located inside the hardware/s10gx/scripts and hardware/s10gx directory together.
Figure 12. Complete Flow Diagram of Intel® Stratix® 10 Reference BSPThe following flowchart explains the sequence of events that takes place after you execute the aoc command to compile a kernel:

The image provides an overview of scripts called and respective stages executed during each phase of the compile, depending on which project revision (flat, base or top) is targeted. As soon as you execute the aoc command, for example, aoc -bsp-flow=<flat/base/top> kernel.cl -o kernel.aocx; the Intel® FPGA SDK for OpenCL™ Offline Compiler looks at the board_spec.xml associated with the provided BSP and calls the pre_flow_pr.tcl script for the particular project revision. It then goes into some decision stages and runs compile_script.tcl and post_flow_pr.tcl scripts underneath for a complete successful compile. For more details about the information provided in the flowchart, view scripts under the hardware/s10gx directory inside your board support package.

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