Intel® FPGA SDK for OpenCL™: Intel® Stratix® 10 GX FPGA Development Kit Reference Platform Porting Guide

ID 683809
Date 3/28/2022
Public
Document Table of Contents

2.1.4. Board Support Package Software Layer

The following image illustrates the platform software stack:

Figure 6. High Level Software Flow

The runtime and Hardware Abstraction Layer (HAL) are part of the Intel® FPGA SDK for OpenCL™ or Intel® FPGA RTE for OpenCL. The Host-to-Device Memory Mapped Device (MMD) and PCIe Kernel Driver are delivered as a part of the BSP. Hence, apart from rebranding the BSP, you might need to update some code in the MMD or driver based on changes in the hardware project.

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