Intel® MAX® 10 FPGA Device Datasheet

ID 683794
Date 11/01/2021
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Hysteresis Specifications for Schmitt Trigger Input

Intel® MAX® 10 devices support Schmitt trigger input on all I/O pins. A Schmitt trigger feature introduces hysteresis to the input signal for improved noise immunity, especially for signal with slow edge rate.

Table 19.  Hysteresis Specifications for Schmitt Trigger Input for Intel® MAX® 10 Devices
Symbol Parameter Condition Minimum Unit
VHYS Hysteresis for Schmitt trigger input VCCIO = 3.3 V 180 mV
VCCIO = 2.5 V 150 mV
VCCIO = 1.8 V 120 mV
VCCIO = 1.5 V 110 mV
Figure 3. LVTTL/LVCMOS Input Standard Voltage Diagram
Figure 4. Schmitt Trigger Input Standard Voltage Diagram