Intel® MAX® 10 FPGA Device Datasheet

ID 683794
Date 11/01/2021
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Single-Ended I/O Standards Specifications

Table 20.  Single-Ended I/O Standards Specifications for Intel® MAX® 10 DevicesTo meet the IOL and IOH specifications, you must set the current strength settings accordingly. For example, to meet the 3.3-V LVTTL specification (4 mA), you should set the current strength settings to 4 mA. Setting at lower current strength may not meet the IOL and IOH specifications in the datasheet.
I/O Standard VCCIO (V) VIL (V) VIH (V) VOL (V) VOH (V) IOL (mA) IOH (mA)
Min Typ Max Min Max Min Max Max Min
3.3 V LVTTL 3.135 3.3 3.465 –0.3 0.8 1.7 3.6 0.45 2.4 4 –4
3.3 V LVCMOS 3.135 3.3 3.465 –0.3 0.8 1.7 3.6 0.2 VCCIO – 0.2 2 –2
3.0 V LVTTL 2.85 3 3.15 –0.3 0.8 1.7 VCCIO + 0.3 0.45 2.4 4 –4
3.0 V LVCMOS 2.85 3 3.15 –0.3 0.8 1.7 VCCIO + 0.3 0.2 VCCIO – 0.2 0.1 –0.1
2.5 V LVTTL and LVCMOS 2.375 2.5 2.625 –0.3 0.7 1.7 VCCIO + 0.3 0.4 2 1 –1
1.8 V LVTTL and LVCMOS 1.71 1.8 1.89 –0.3 0.35 × VCCIO 0.65 × VCCIO 2.25 0.45 VCCIO –0.45 2 –2
1.5 V LVCMOS 1.425 1.5 1.575 –0.3 0.35 × VCCIO 0.65 × VCCIO VCCIO + 0.3 0.25 × VCCIO 0.75 × VCCIO 2 –2
1.2 V LVCMOS 1.14 1.2 1.26 –0.3 0.35 × VCCIO 0.65 × VCCIO VCCIO + 0.3 0.25 × VCCIO 0.75 × VCCIO 2 –2
1.0 V LVCMOS 14 0.95 1.0 1.05 –0.3 0.35 × VCCIO 0.65 × VCCIO VCCIO + 0.3 0.25 × VCCIO 0.75 × VCCIO 4 –4
3.3 V Schmitt Trigger 3.135 3.3 3.465 –0.3 0.8 1.7 VCCIO + 0.3
2.5 V Schmitt Trigger 2.375 2.5 2.625 –0.3 0.7 1.7 VCCIO + 0.3
1.8 V Schmitt Trigger 1.71 1.8 1.89 –0.3 0.35 × VCCIO 0.65 × VCCIO VCCIO + 0.3
1.5 V Schmitt Trigger 1.425 1.5 1.575 –0.3 0.35 × VCCIO 0.65 × VCCIO VCCIO + 0.3
3.0 V PCI 2.85 3 3.15 0.3 × VCCIO 0.5 × VCCIO VCCIO + 0.3 0.1 × VCCIO 0.9 × VCCIO 1.5 –0.5
14 The 1.0 V LVCMOS I/O standard is available only for the following device combinations and subject to device OPN availability:

10M02/04/08/16/25/40/50 + SC/DC/SA/DA/DD + U324/U169/F256/F484 + I7/C7/C8