Intel® MAX® 10 FPGA Device Datasheet

ID 683794
Date 11/01/2021
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Single-Ended SSTL, HSTL, and HSUL I/O Standards Signal Specifications

Table 22.  Single-Ended SSTL, HSTL, and HSUL I/O Standards Signal Specifications for Intel® MAX® 10 DevicesTo meet the IOL and IOH specifications, you must set the current strength settings accordingly. For example, to meet the SSTL-15 Class I specification (8 mA), you should set the current strength settings to 8 mA. Setting at lower current strength may not meet the IOL and IOH specifications in the datasheet.
I/O Standard VIL(DC) (V) VIH(DC) (V) VIL(AC) (V) VIH(AC) (V) VOL (V) VOH (V) IOL (mA) IOH (mA)
Min Max Min Max Min Max Min Max Max Min
SSTL-2 Class I VREF – 0.18 VREF + 0.18 VREF – 0.31 VREF + 0.31 VTT – 0.57 VTT + 0.57 8.1 –8.1
SSTL-2 Class II VREF – 0.18 VREF + 0.18 VREF – 0.31 VREF + 0.31 VTT – 0.76 VTT + 0.76 16.4 –16.4
SSTL-18 Class I VREF – 0.125 VREF + 0.125 VREF – 0.25 VREF + 0.25 VTT –0.475 VTT + 0.475 6.7 –6.7
SSTL-18 Class II VREF – 0.125 VREF + 0.125 VREF – 0.25 VREF + 0.25 0.28 VCCIO – 0.28 13.4 –13.4
SSTL-15 Class I VREF – 0.1 VREF + 0.1 VREF – 0.175 VREF + 0.175 0.2 × VCCIO 0.8 × VCCIO 8 –8
SSTL-15 Class II VREF – 0.1 VREF + 0.1 VREF – 0.175 VREF + 0.175 0.2 × VCCIO 0.8 × VCCIO 16 –16
SSTL-135 VREF – 0.09 VREF + 0.09 VREF – 0.16 VREF + 0.16 0.2 × VCCIO 0.8 × VCCIO
HSTL-18 Class I VREF – 0.1 VREF + 0.1 VREF – 0.2 VREF + 0.2 0.4 VCCIO – 0.4 8 –8
HSTL-18 Class II VREF – 0.1 VREF + 0.1 VREF – 0.2 VREF + 0.2 0.4 VCCIO – 0.4 16 –16
HSTL-15 Class I VREF – 0.1 VREF + 0.1 VREF – 0.2 VREF + 0.2 0.4 VCCIO – 0.4 8 –8
HSTL-15 Class II VREF – 0.1 VREF + 0.1 VREF – 0.2 VREF + 0.2 0.4 VCCIO – 0.4 16 –16
HSTL-12 Class I –0.15 VREF – 0.08 VREF + 0.08 VCCIO + 0.15 –0.24 VREF – 0.15 VREF + 0.15 VCCIO + 0.24 0.25 × VCCIO 0.75 × VCCIO 8 –8
HSTL-12 Class II –0.15 VREF – 0.08 VREF + 0.08 VCCIO + 0.15 –0.24 VREF – 0.15 VREF + 0.15 VCCIO + 0.24 0.25 × VCCIO 0.75 × VCCIO 14 –14
HSUL-12 VREF – 0.13 VREF + 0.13 VREF – 0.22 VREF + 0.22 0.1 × VCCIO 0.9 × VCCIO

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