Intel® MAX® 10 FPGA Device Datasheet

ID 683794
Date 10/31/2022
Public
Document Table of Contents

Internal Configuration Time

The internal configuration time measurement is from the rising edge of nSTATUS signal to the rising edge of CONF_DONE signal.

Table 55.  Internal Configuration Time for Intel® MAX® 10 Devices (Uncompressed .rbf)
Device Internal Configuration Time (ms)
Unencrypted Encrypted
Without Memory Initialization With Memory Initialization Without Memory Initialization With Memory Initialization
Min Max Min Max Min Max Min Max
10M02/

10M02SCU324
0.3/0.6 1.7/2.7 1.7/5.0 5.4/15.0
10M04 0.6 2.7 1.0 3.4 5.0 15.0 6.8 19.6
10M08 0.6 2.7 1.0 3.4 5.0 15.0 6.8 19.6
10M16 1.1 3.7 1.4 4.5 9.3 25.3 11.7 31.5
10M25 1.0 3.7 1.3 4.4 14.0 38.1 16.9 45.7
10M40 2.6 6.9 3.2 9.8 41.5 112.1 51.7 139.6
10M50 2.6 6.9 3.2 9.8 41.5 112.1 51.7 139.6
Table 56.  Internal Configuration Time for Intel® MAX® 10 Devices (Compressed .rbf)Compression ratio depends on design complexity. The minimum value is based on the best case (25% of original .rbf sizes) and the maximum value is based on the typical case (70% of original .rbf sizes).
Device Internal Configuration Time (ms)
Unencrypted/Encrypted
Without Memory Initialization With Memory Initialization
Min Max Min Max
10M02/10M02SCU324 0.3/0.6 5.2/10.7
10M04 0.6 10.7 1.0 13.9
10M08 0.6 10.7 1.0 13.9
10M16 1.1 17.9 1.4 22.3
10M25 1.1 26.9 1.4 32.2
10M40 2.6 66.1 3.2 82.2
10M50 2.6 66.1 3.2 82.2

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