Intel® MAX® 10 FPGA Device Datasheet

ID 683794
Date 11/01/2021
Public
Download
Document Table of Contents

Internal Weak Pull-Up Resistor

All I/O pins, except configuration, test, and JTAG pins, have an option to enable weak pull-up.

Table 17.  Internal Weak Pull-Up Resistor for Intel® MAX® 10 Devices Pin pull-up resistance values may be lower if an external source drives the pin higher than VCCIO.
Symbol Parameter Condition Min Typ Max Unit
R_PU Value of I/O pin (dedicated and dual-purpose) pull-up resistor before and during configuration, as well as user mode if the programmable pull-up resistor option is enabled VCCIO = 3.3 V ± 5% 7 12 34
VCCIO = 3.0 V ± 5% 8 13 37
VCCIO = 2.5 V ± 5% 10 15 46
VCCIO = 1.8 V ± 5% 16 25 75
VCCIO = 1.5 V ± 5% 20 36 106
VCCIO = 1.2 V ± 5% 33 82 179

Did you find the information on this page useful?

Characters remaining:

Feedback Message