Intel® Agilex™ F-Series and I-Series General-Purpose I/O User Guide

ID 683780
Date 6/14/2022

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Document Table of Contents

2.2. GPIO Features

The I/O bank within the GPIO interface supports differential and single-ended I/O standards. The GPIO bank has true differential I/O buffer pairs using the True Differential Signaling I/O standard—compatible with the LVDS, RSDS, Mini-LVDS, and LVPECL I/O standards. One true differential buffer pair forms a true differential channel.

Differential I/Os

  • If you use SERDES, half of the true differential buffers support dedicated transmitter channels and the other half support dedicated true receiver channels. Refer to the device pin-out files for locations of the dedicated receiver and transmitter channels.
  • If you do not use SERDES, you can configure any of the true differential buffers as transmitter or receiver channels. Each I/O lane support up to six transmitter and three receiver channels.
  • The differential voltage referenced output pins are not true differential output pins. The differential voltage referenced I/O standards use two single-ended output pins where one of the output pins is inverted.

Power Pins for the I/O Buffers

The VCCIO_PIO and VCCPT pins power the I/O buffers located in the I/O bank within the GPIO interface.

I/O Buffer Features

  • Single-ended non-voltage referenced and voltage referenced I/O standards
  • Differential voltage-referenced I/O standards
  • True differential transmitters and receivers
  • Serializer/deserializer (SERDES)
  • Programmable slew rate
  • Programmable bus-hold
  • Programmable weak pull-up resistor
  • Programmable differential output voltage (VOD) for true differential output buffers
  • Programmable open-drain output
  • On-chip series termination (RS OCT) with and without calibration
  • On-chip parallel termination (RT OCT)
  • On-chip differential termination (RD OCT)
  • Dynamic on-chip parallel termination
  • Internally generated VREF with DDR4 calibration
  • Programmable pre-emphasis for true differential output buffer
  • Programmable de-emphasis for voltage-referenced I/O standards