Intel® Agilex™ F-Series and I-Series General-Purpose I/O User Guide

ID 683780
Date 6/14/2022
Public

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2.5.11. SDM Shared I/O Requirements

The Avalon® streaming interface ×16 and ×32 configuration modes use the configuration pins located in a GPIO bank for device configuration. The 1.2 V VCCIO_PIO, instead of the 1.8 V VCCIO_SDM, powers the GPIO bank.

When you use Avalon® streaming interface ×16 or ×32 configuration scheme, Avalon® streaming interface pins in the SDM shared IO bank are not usable as user I/Os for:

  • Designs that use external partial reconfiguration, for example, designs that send partial reconfiguration bitstream using Avalon® streaming interface pins.
  • Designs that use the HPS.

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