Intel® Agilex™ F-Series and I-Series General-Purpose I/O User Guide

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ID 683780
Date 6/14/2022
Public
Document Table of Contents

2.1.1. GPIO Bank Structure

Figure 2.  Intel® Agilex™ I/O Bank Structure (Die Top View)This figure shows the I/O bank structure of the Intel® Agilex™ device. The figure shows the view of the die, as shown in the Intel® Quartus® Prime Chip Planner. In the Pin Planner, the view is flipped. Different device packages have different number of I/O banks. Refer to the device pin-out files for available I/O banks and the locations of the SDM and HPS shared I/O banks for each device package.

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