Intel® Agilex™ F-Series and I-Series General-Purpose I/O User Guide

ID 683780
Date 6/14/2022

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2.6.3. Net Length Reports

The net length information consists of the package trace delay from the die pad to the package pin. Each pin in an FPGA package has its own net length information. This information is important for you to perform board trace compensation to optimize the channel-to-channel skew on your board design.