Intel® Agilex™ F-Series and I-Series General-Purpose I/O User Guide

Download
ID 683780
Date 6/14/2022
Public
Document Table of Contents

7.2. Programmable De-Emphasis

To compensate for signal degradation over long transmission path, you can alter the signal amplitude through the programmable de-emphasis feature.
Table 63.  Programmable De-emphasis Feature Description
Item Description
Availability

Available for an external memory interface implementation with the following conditions:

  • The slew rate is Fast.
  • The I/O standard is single-ended or differential SSTL12, HSTL12, HSUL12, or POD12.
Implementation

Two-tap de-emphasis implementation:

  • A main tap.
  • A delayed post tap at 1 UI or 0.5 UI, depending on the interface clock frequency.
Behavior

If turned on, the feature attenuates the I/O signal height, for the following interface clock frequency ranges, when the symbol is longer than the specified durations:

  • Below 600 MHz—the de-emphasis effect affects the symbol after 0.5 UI.
  • Above 600 MHz—the de-emphasis effect affects the symbol after 1 UI.
Types
  • Constant impedance de-emphasis:
    • Available for single-ended and differential SSTL-12, HSTL-12, and HSUL-12 I/O standards.
    • Provides double the effective equalization level of the low power de-emphasis.
    • Three equalization settings: low, medium, and high.
  • Low power de-emphasis:
    • Available for single-ended and differential SSTL-12, HSTL-12, HSUL-12, and POD12 I/O standards.
    • Three equalization settings: low, medium, and high.
Recommendations
  • The de-emphasis effect reduces eye height. If you use a non-default de-emphasis setting, perform an IBIS or HSPICE simulation to estimate the I/O buffer's electrical performance.
  • To get the optimal setting for your design, start the simulation with the lowest de-emphasis setting. Then, fine-tune the setting until you get the best signal integrity condition.
Figure 53. De-emphasis Off: Signal Attenuation for SSTL and HSTL I/O Standards
Figure 54. Constant Impedance De-emphasis: Signal Attenuation for SSTL and HSTL I/O Standards
Figure 55. Low Power De-emphasis: Signal Attenuation for SSTL and HSTL I/O Standards
Figure 56. De-emphasis Off: Signal Attenuation for POD12 I/O Standard
Figure 57. Low Power De-emphasis: Signal Attenuation for POD12 I/O Standard

Did you find the information on this page useful?

Characters remaining:

Feedback Message