Intel® Agilex™ F-Series and I-Series General-Purpose I/O User Guide

ID 683780
Date 6/14/2022
Public

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3.2.2. HPS I/O Buffer Behavior

Table 21.  HPS I/O Pins Guideline for Different Pin States
HPS I/O Pin State
Not turned on Powering up Fully powered up HPS initialization HPS boot completed Powering down

Pin voltage must not exceed VCCIO_HPS .

  • Pin voltage must not exceed VCCIO_HPS .
  • All pins are in undetermined state.
All pins are configured as Schmitt Trigger input with 20 kΩ weak pull-up enabled. All pins are configured as Schmitt Trigger input with 20 kΩ weak pull-up enabled. Valid data transactions can be initiated.
  • Pin voltage must not exceed VCCIO_HPS .
  • All pins are in undetermined state.
Note: After the Intel® Agilex™ device fully powers up, input signals of the HPS I/O pins must not exceed the maximum DC input voltage specified in the device data sheet.

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