Intel® Agilex™ F-Series and I-Series General-Purpose I/O User Guide

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ID 683780
Date 6/14/2022
Public
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2.5.4. I/O Pins Placement Requirements

  • Only DQS pins support differential voltage referenced input standard.
  • Each ×4 DQ group shares the same OE, reset, and clock enable signals. Therefore, you cannot split the OE, reset, or clock enable signals within a ×4 DQ group.
Figure 17. Example of OE, Reset, and Clock Enable Signals Sharing for a ×4 DQ Group in a Pinout File

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