Intel® Agilex™ F-Series and I-Series General-Purpose I/O User Guide

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ID 683780
Date 6/14/2022
Public
Document Table of Contents

4.2.2. SDM I/O Buffer Behavior

Table 28.  SDM I/O Pins Guideline for Different Pin States
SDM I/O Pin State
Not turned on Powering up Fully powered up Configuration mode Powering down

Pin voltage must not exceed VCCIO_SDM .

  • Pin voltage must not exceed VCCIO_SDM .
  • All pins are in undetermined state, except these pins:
    • VSIGP_0
    • VSIGP_1
    • VSIGN_0
    • VSIGN_1
    • RREF_SDM
Refer to the related information. Refer to the related information.
  • Pin voltage must not exceed VCCIO_SDM .
  • All pins are in undetermined state, except these pins:
    • VSIGP_0
    • VSIGP_1
    • VSIGN_0
    • VSIGN_1
    • RREF_SDM

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