Design Flow System Specification Device Selection Early System and Board Planning Pin Connection Considerations for Board Design I/O and Clock Planning Security Considerations Design Entry Design Implementation, Analysis, Optimization, and Verification Document Revision History for Intel® Stratix® 10 Device Design Guidelines
|1||Consider the available device variants.|
|2||Select a device based on transceivers, protocol IP cores, I/O pin count, LVDS channels, package offering, logic/memory/multiplier density, PLLs, clock routing, and speed grade.|
The Intel® Stratix® 10 device family consists of several device variants optimized to meet different application requirements.
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