Intel® Stratix® 10 Device Design Guidelines

ID 683738
Date 8/24/2022
Document Table of Contents

Optional Configuration Pins

Table 22.  Optional Configuration Pins Checklist
Number Done? Checklist Item
1   Plan the board design to support optional configuration pins as required.

You can enable the following optional configuration pins:

  • OSC_CLK_1—Must be connected to a 25 MHz, 100 MHz, or 125 MHz source if used.

Intel® Stratix® 10 devices use OSC_CLK_1 pin as the reference clock for transceiver calibration. You must provide a stable and free running clock input at this pin.