Design Flow System Specification Device Selection Early System and Board Planning Pin Connection Considerations for Board Design I/O and Clock Planning Security Considerations Design Entry Design Implementation, Analysis, Optimization, and Verification Document Revision History for Intel® Stratix® 10 Device Design Guidelines
JTAG Pin Connections
|1||Connect JTAG pins correctly to the download cable header. Ensure the pin order is not reversed.|
|2||To disable the JTAG state machine during power-up, pull the TCK pin low through a resistor to ensure that an unexpected rising edge does not occur on the TCK pin.|
|3||Pull the TMS and TDI pins high through a resistor.|
A device operating in JTAG mode uses four required pins—TDI, TDO, TMS, and TCK. The TCK pin has an internal weak pull-down resistor, while the TDI and TMS pins have weak internal pull-up resistors.
If you have more than one device in the chain, connect the TDO pin of a device to the TDI pin of the next device in the chain.
Noise on the JTAG pins during configuration, user mode, or power-up can cause the device to go into an undefined state or mode.
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