Design Flow System Specification Device Selection Early System and Board Planning Pin Connection Considerations for Board Design I/O and Clock Planning Security Considerations Design Entry Design Implementation, Analysis, Optimization, and Verification Document Revision History for Intel® Stratix® 10 Device Design Guidelines
PLLs and Clock Routing
|1||Verify the number of PLLs and clock resources.|
Verify that your chosen device density package combination includes enough PLLs and clock routing resources for your design.
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