Design Flow System Specification Device Selection Early System and Board Planning Pin Connection Considerations for Board Design I/O and Clock Planning Security Considerations Design Entry Design Implementation, Analysis, Optimization, and Verification Document Revision History for Intel® Stratix® 10 Device Design Guidelines
Download Cable Operating Voltage
|1||Ensure the download cable and JTAG pin voltages are compatible because the download cable interfaces with the JTAG pins of your device.|
The operating voltage supplied to the Intel download cable by the target board through the 10-pin header determines the operating voltage level of the download cable.
JTAG pins in the Intel® Stratix® 10 device are powered up by VCCIO_SDM. In a JTAG chain containing devices with different VCCIO levels, ensure that the VIL max, VIH min, and the maximum VI specifications of the device JTAG input pins are not violated. Level shifter might be required between devices to meet the voltage specifications of the devices input pin.
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