Design Flow System Specification Device Selection Early System and Board Planning Pin Connection Considerations for Board Design I/O and Clock Planning Security Considerations Design Entry Design Implementation, Analysis, Optimization, and Verification Document Revision History for Intel® Stratix® 10 Device Design Guidelines
Dual Purpose Configuration Pins
|1||Plan the dual purpose pins that can function as configuration pins and user I/O pins.|
The below configuration pins used for the Avalon® -ST ×16 and ×32 configuration schemes can optionally be used as user I/O pins after configuration has completed. Enable the pins to function as dual purpose pins in the Intel® Quartus® Prime software prior to compilation, if desired.
- AVST_DATA[31:16]—for Avalon® -ST ×32 configuration scheme
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