Intel® MAX® 10 Analog to Digital Converter User Guide

ID 683596
Date 5/04/2021

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents Threshold Detection Core

The threshold detection core compares the sample value that the ADC block receives to the threshold value that you define during Modular ADC Core IP core configuration. This core does not have run-time configurable options.

If the ADC sample value is beyond the maximum or minimum threshold limit, the threshold detection core issues a violation notification through the Avalon-ST interface.

The threshold detection core has a single clock domain.

Figure 22. Threshold Detection Core High-Level Block Diagram