Intel® MAX® 10 Analog to Digital Converter User Guide

ID 683596
Date 5/04/2021
Document Table of Contents

3.2. Guidelines: Board Design for Power Supply Pin and ADC Ground (REFGND)

The crosstalk requirement for analog to digital signal is -100 dB up to 2 GHz. There must be no parallel routing between power, ground, and surrounding general purpose I/O traces. If a power plane is not possible, route the power and ground traces as wide as possible.
  • To reduce IR drop and switching noise, keep the impedance as low as possible for the ADC power and ground. The maximum DC resistance for power is 1.5 Ω.
  • The power supplies connected to the ADC should have ferrite beads in series followed by a 10 µF capacitor to the ground. This setup ensures that no external noise goes into the device power supply pins.
  • Decouple each of the device power supply pin with a 0.1 µF capacitor. Place the capacitor as close as possible to the device pin.
Figure 25. Recommended RC Filter for Power Traces

There is no impedance requirement for the REFGND. Intel recommends that you use the lowest impedance with the most minimum DC resistance possible. Typical resistance is less than 1 Ω.

Intel recommends that you set a REFGND plane that extends as close as possible to the corresponding decoupling capacitor and FPGA:

  • If possible, define a complete REFGND plane in the layout.
  • Otherwise, route the REFGND using a trace that is as wide as possible from the island to the FPGA pins and decoupling capacitor.
  • The REFGND ground is the analog ground plane for the ADC VREF and analog input.
  • Connect REFGND ground to the system digital ground through ferrite beads. You can also evaluate the ferrite bead option by comparing the impedance with the frequency specifications.

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