Intel® MAX® 10 Analog to Digital Converter User Guide

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ID 683596
Date 5/04/2021
Public
Document Table of Contents

4.1. Creating Intel® MAX® 10 ADC Design

To create your ADC design, you must customize and generate the ALTPLL and Modular ADC Core IP cores.

The ALTPLL IP core provides the clock for the Modular ADC Core IP core.

  1. Customize and generate the ALTPLL IP core.
  2. Customize and generate the Modular ADC Core IP core.
  3. Connect the ALTPLL IP core to the Modular ADC Core IP core.
  4. Create ADC Avalon slave interface to start the ADC.

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