Intel® MAX® 10 Analog to Digital Converter User Guide

ID 683596
Date 5/04/2021
Document Table of Contents

5.4.8. ADC PLL Clock Interface of Modular ADC Core and Modular Dual ADC Core

The ADC PLL clock interface is a clock sink interface type.
Table 33.  ADC PLL Clock Interface Signals
Signal Width (Bit) Description
clock 1

ADC hard IP clock source from C0 output of dedicated PLL1 or PLL3.

Export this interface from the Qsys system.

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