Intel® MAX® 10 Analog to Digital Converter User Guide

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ID 683596
Date 5/04/2021
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2.2. Modular ADC Core and Modular Dual ADC Core IP Cores

You can use the Modular ADC Core and Modular Dual ADC Core IP cores to generate soft IP controllers for the ADC hard IP blocks in Intel® MAX® 10 devices.

There are two ADC IP cores:

  • Modular ADC Core IP core—each instance can control one ADC hard IP block. In a dual ADC device, you can instantiate one Modular ADC Core IP core instance for each ADC block. However, both instances will be asynchronous to each other.
  • Modular Dual ADC Core IP core—you can control both ADC hard IP block with a single IP instance.
    • For the analog input pins (ANAIN1 and ANAIN2) in both ADC hard IP blocks, the measurement is synchronous.
    • For the dual function input pins, there are some measurement timing differences caused by the routing latency.

You can perform the following functions with the Modular ADC Core or Modular Dual ADC Core IP core parameter editor:

  • Configure the ADC clock, sampling rate, and reference voltage.
  • Select which analog input channels that the ADC block samples.
  • Configure the threshold value to trigger a threshold violation notification.
  • Set up a conversion sequence to determine which channel requires more frequent attention.

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