Intel® MAX® 10 Analog to Digital Converter User Guide

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ID 683596
Date 5/04/2021
Public
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2.2.2.4. Response Merge Core

The response merge core merges simultaneous responses from two ADC control cores in the Modular Dual ADC Core IP core.

The Modular Dual ADC Core IP core uses the response merge core if you use the following configurations:

  • Standard Sequencer with Avalon-MM Sample Storage
  • Standard Sequencer with Avalon-MM Sample Storage and Threshold Violation Detection
Figure 20. Response Merge Core High-Level Block Diagram


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